Please use this identifier to cite or link to this item: http://repositorio.udec.cl/jspui/handle/11594/4015
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dc.contributor.advisorFigueroa Toro, Miguel Ernesto; supervisor de gradoes
dc.contributor.authorCarvajal Barrera, Gonzalo Andréses
dc.date.accessioned2021-01-18T17:33:01Z-
dc.date.available2021-01-18T17:33:01Z-
dc.date.issued2013-
dc.identifier.urihttp://repositorio.udec.cl/jspui/handle/11594/4015-
dc.descriptionTesis para optar al grado de Doctor en Ciencias de la Ingeniería con Mención en Ingeniería Eléctrica.es
dc.description.abstractEthernet is widely recognized as an attractive networking technology for next-generation dis- tributed embedded systems in multiple domains such as avionics, automotive, industrial control, medical devices, among others. High bandwidth, low-cost, and easy integration with traditional networking infrastructures make Ethernet a potential solution to the challenges for future embedded applications. However, due to the intrinsic competitive approach of the standard, Ethernet components require speci c modi cations and hardware support to provide the strict timing guarantees required for safety-critical applications. While the literature reports multiple mechanisms to coordinate the exchange of messages in Ethernet networks, the design, implemen-tation, and evaluation of the necessary hardware components remains mostly unexplored. This lack of experimental validation is hindering the adoption and further developments in real-time networking. This dissertation explores the challenges related to the design and implementation of Ethernet components based on timing speci cations. In particular, the work focuses on providing the hardware infrastructure for the Network Code framework, which de nes a communication model based on Time Division Multiple Access (TDMA) arbitration that is well-suited for safety-critical applications. The ultimate result of this research is the release of Atacama, the rst open-source framework based on recon gurable hardware for mixed-criticality communication in multi- segmented Ethernet networks. Atacama uses highly-specialized modules for the execution of Network Code schedules, delivering low and predictable latency for real-time frames in multi-hop topologies. The modules seamlessly integrate with a standard Ethernet infrastructure operating with best-e ort tra c. The result is an integral framework that covers from the formal de nition of the communication model, all the way down to the implementation of the prototypes, which enable easy optimization of devices for speci c application scenarios, and rapid prototyping of new protocol characteristics. Researchers can use the open-source design to verify our results and build upon the framework, which aims to accelerate the development, validation, and adoption of Ethernet-based solutions in real-time applications. The components of the framework developed in this thesis will be available on request under a GNU Lesser General Public License version 3.es
dc.language.isoenges
dc.publisherUniversidad de Concepción.es
dc.rightsCreative Commoms CC BY NC ND 4.0 internacional (Atribución-NoComercial-SinDerivadas 4.0 Internacional)-
dc.rights.urihttps://creativecommons.org/licenses/by-nc-nd/4.0/deed.es-
dc.subjectEthernet (Sistema de Red de Área Local)-
dc.subjectRedes de Área Local (Redes De Computadores).-
dc.titleNetwork devices for hard real-time communication on switched ethernet.es
dc.typeTesises
dc.description.facultadDepartamento de Ingeniería Eléctricaes
dc.description.departamentoDepartamento de Ingeniería Eléctrica.es
Appears in Collections:Ingeniería Eléctrica - Tesis Doctorado

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